TY  - BOOK
AU  - Maxfield,Clive
TI  - The design warrior's guide to FPGAs: devices, tools and flows 
SN  - 0750676043
AV  - TK 7895 M463d 2004
U1  - 621.39 
PY  - 2004///
CY  - Amsterdam
PB  - Newnes/Elsevier
KW  - Réseaux logiques programmables par l'utilisateur
KW  - Field programmable gate arrays
KW  - Matrices de puertas programables
KW  - Primera Jornada de Catalogacion
KW  - Application
KW  - Architecture
KW  - Circuit
KW  - Fpga
KW  - Integre
KW  - Logique
KW  - Matrice
KW  - Porte
KW  - Programmable
KW  - Reseau
KW  - Utilisateur
KW  - Specifique
KW  - Numerique
KW  - Matériel didactique
N1  - Comprend un index; Comprend des réf. bibliogr; Comprend un index; Ch. 1; Introduction --; Ch. 2; Fundamental concepts --; Ch. 3; The origin of FPGAs --; Ch. 4; Alternative FPGA architectures --; Ch. 5; Programming (configuring) an FPGA --; Ch. 6; Who are all the players? --; Ch. 7; FPGA versus ASIC design styles --; Ch. 8; Schematic-based design flows --; Ch. 9; HDL-based design flows --; Ch. 10; Silicon virtual prototyping for FPGAs --; Ch. 11; C/C++ etc.-based design flows --; Ch. 12; DSP-based design flows --; Ch. 13; Embedded processor-based design flows --; Ch. 14; Modular and incremental design --; Ch. 15; High-speed design and other PCB considerations --; Ch. 16; Observing internal nodes in an FPGA --; Ch. 17; Intellectual property --; Ch. 18; Migrating ASIC designs to FPGAs and vice versa --; Ch. 19; Simulation, synthesis, verification, etc. design tools --; Ch. 20; Choosing the right device --; Ch. 21; Gigabit transceivers --; Ch. 22; Reconfigurable computing --; Ch. 23; Field-programmable node arrays --; Ch. 24; Independent design tools --; Ch. 25; Creating an open-source-based design flow --; Ch. 26; Future FPGA developments --; App. A; Signal integrity 101 --; App. B; Deep-submicron delay effects 101 --; App. C; Linear feedback shift registers 101
UR  - http://catdir.loc.gov/catdir/description/els051/2004557408.html
UR  - http://catdir.loc.gov/catdir/toc/els051/2004557408.html
ER  -